Research And Implementation Of BPSK/ QPSK Demodulation System Of Satellite Communication Receiver

In the existing digital satellite communication system, the demodulation module of receiver mostly choose DSP to achieve, its processing speed is slow, and can not adapt to large bandwidth, high rate of digital demodulation. At the same time, the demodulation system has the technical flaws of single function, and high power consumption. In order to satisfy the satellite communication system for large bandwidth, high speed, low power consumption, such as the requirements of technical indicators, this paper proposed a system of all-digital demodulation scheme based on FPGA, implements the digital demodulation of BPSK/QPSK signal. This paper illustrated the all-digital BPSK/QPSK demodulation scheme adopts the advanced FPGA and DSP chip, combined with the digital orthogonal demodulation technology, mainly including A/D conversion, digital frequency conversion, and digital demodulation key technology of carrier synchronization, bit synchronization, etc. Its characteristic is the combination of software and hardware, makes the demodulation system of the smaller amount of computations, faster processing speed,lower latency and so on.In order to satisfy satellite communication receiver signal processing of high speed, large bandwidth indicators such as requirements, based on B/QPSK demodulation of two key model, carried on the thorough research and the engineering implementation. First describes the characteristics of digital orthogonal demodulation and concepts, and then some key technologies of FPG A to realize full digital demodulation for the corresponding research, focusing on the carrier synchronization and bit synchronization technology has made the detailed research and algorithm improvement, and implements the engineered.The author’s main productions and contributions are as follows:① Study and improve the BPSK/QPSK signal all-digital demodulation method, this method divide digital signal into I/Q 2 road, using digital demodulation algorithm, realization of digital demodulation of various kinds of patterns. In the system, adopting high speed of FPGA and DSP chips built demodulation system, realized all- digital demodulation of BPSK/ QPSK signal.② Study and improve the carrier synchronization and bit synchronization technology of two kinds of implementations. Carrier synchronization is to use the phase signal of all-digital demodulation of BPSK/QPSK to control and adjust the NCO, the formation of Costas loop to complete tracking. After the carrier synchronization, bit synchronization is to use modified early- late gate algorithm, make the signal sampling rate and symbol rate achieve synchronization in the whole process.③ The demodulation processing algorithms are used to achieve the general part of the demodulation system engineering. Among them, the use of FPGA to complete the core of demodulation algorithm processing, DSP as a high-speed data channel will after demodulation data to demonstrate to the Windows platform. On the platform, through the constellation diagram and the eye diagram key demodulation technology indexes such as demonstration, validation correctly demodulation processing algorithm proposed by this paper. At the same time, also for other types of digital demodulation scheme provides extension platform.