Design And Performance Analysis Of LOP Algorithms Based On FPGA

In recent years, mobile multimedia technology is developing rapidly,people have become increasingly demanding on real-time,it also made a great test performance of the processor. To improve the processing speed of floating-point data is imminent, so respect to study of how to accelerate floating-point arithmetic is very important. Processor operations floating-point are mainly floating-point multiply and floating-point add operation, therefore, the floating-point multiply-add integration component is the focus of this study. The floating-point multiply-add operations as research subjects, as an FPGA platform design floating point multiply-add fused components, based on the fully understand and analyze existing floating-point multiply-add fusion algorithm,improve the performance of the LOP module, that will improve the overall performance of the fusion components.This paper studies how to improve floating-point multiply-add component of the problem of computing speed, through the study of the critical path of the integration of the floating-point multiply-add component, so to improve its speed of operation will increase the floating-point multiply-add integration components processing speed.Firstly, this paper describes several existing LOP algorithm structure briefly. Select a more balanced serial correction LOP algorithm in delay area and power. For performance analysis, studied 3: 2CSA carry-save adder circuit and Leading one prediction algorithm detailedly of serial correction LOP algorithm.Secondly, through in-depth study of leading one prediction algorithm,deduce the coding rules of three-operand leading one prediction algorithm, designed circuit by the encoding rules, then come the three-operand leading one prediction algorithm performance reporting data through logic synthesis tool, To compare the performance of two algorithms, compare their respective advantages and disadvantages.Finally, devise a detection circuit by segmented detection methods detect the position of the first one of the output of the LOP algorithm module, draw its correctness by simulation analysis.