Design Of LS-SVM Accelerator With ZYNQ

The Least Square Support Vector Machine(LS-SVM) algorithm which has the advantage of high training efficiency, strong generalization ability has widely been used in online or real-time health management for complex systems. Online or real-time system health management often relies on embedded computing platform, meanwhile, in the computing performance, power consumption, size and weight are strict constraints. The LS-SVM algorithm has high computational complexity, and is highly dependent on computing resources. So reconfigurable computing based on FPGA is a feasible way to solve this problem. Especially in recent years, the progressive development of heterogeneous So C with parallelization, customizable, low power consumption advantages, provides a new approa ch to solve the problem.The article tries to design LS-SVM algorithm accelerator with embedded computing on Zynq So C which is the latest series of Xilinx, it can solve the co-design problem between processor system(PS) and programmable logic(PL) of So C. At the same time, realize the PL firmware logic rapidly design, simulation and verfication of hign level synthesis development method. LS-SVM is represented in machine learning algorithms which can provide a viable solution for online or health management applications, but also provides a reference for the design of complex algorithms embedded high-performance computing.First, the article design the structure of LS-SVM algorithm accelerator. According to the computing characteristics of LS-SVM algorithm and the processing characteristics of different part in heterogeneous So C, the computing task is divided reasonably for software and hardware, and it determine the function of the two parts PS and PL. After that, the article create a system on a chip with fas t transfer mechanism which can realize fast data access between PS and PL under the heterogeneous platform. In addition, for the task scheduling of the whole algorithm, a design on the control process of So C is development, and finally, the article realized the pipeline computing based on heterogeneous So C.Secondly, based on the structure designed before, algorithm accelerator data path and control program design is developed. According to the results of the hardware and software division, the kernel function and solution of the linear equations are realized separately. For the kernel function, the program has been designed in PS part, and for the linear equations, Cholesky decomposition method is selected. Design the data path based on HLS development appr oach, and then optimize the design based on HLS by selecting the loop unrolling, pipelining and other optimized instructions.Finally, in order to verify the reasonability and validity of the design, the proposed LS-SVM algorithm accelerator was applied to time series forecasting. Furthermore, the time series forecasting experiments were also performed on other different platforms, such as PC, ARM processor, and reconfigura ble Virtex-5 platform to make comparison between computational efficiency, accuracy, resource consumption, power consumption, and the development cycles. The experiment results show that the heterogeneous So C design methodology of LS-SVM algorithm can provide a good solution for embedded high-performance computing, at the same time, provide a reference for the development of design base on HLS.