The Usability Research Of TriBA In Signal Processing

Over the past 60 years, the IT industry has improved the cost-performance of sequential computing by about 100 billion times overall. However, with the technology and the increase of chip complexity, chip’s power consumption and heat problems are more outstanding, it becomes the main obstacle of the single core architecture continuing to follow the development of Moore’s Law. In order to reduce power consumption, to meet the increasingly large scale application problems, to make the performance of the processor continue to be improved in accordance with Moore’s Law, researchers have proposed using multiple processor cores parallel computing approach to further improve the performance of the processor.Tri BA(Triple-based Architecture) is a new object-oriented multi-core processor architecture proposed by the study group which the author belongs to. After many years of researching, many Tri BA key theory and technology problems have been solved. In order to study the Tri BA usability in the field of signal processing, the study group which the author belongs to decides to use multiple pieces of DSP, FPGA chip connected into Tri BA interconnection network structure and apply Tri BA key theory and technology to the signal processing field.To download user?s software code which is developed using the development environment into the specified computing code on the target processing system, it is necessary to design a communication mechanism which connects the host computer and the target processing system. This paper designs a communication agent mechanism that is based on the technology of SOPC, FPGA simulation I/O board. Simulation I/O board communicates with the host computer via Ethernet to exchange data, and communicates witch the target processing system via linkport interface. Simulation I/O board forwards the data from the host computer to the specific node on the target processing system via the linkport interface and transmits the data from the target processing system to the host computer via the network port. Since the target processing system is still in further research and development, so we can only implement partial functions of the simulation I/O board now. This paper implements some functions of the simulation I/O board including the FPGA implementation of the linkport interface, the basic operation of Flash memory, communicating with the host computer via the network port, the design and implementation of data path function.