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The Design And Implementation Of Hardware Platform Integrated High Speed Signal Processing Storage And Transmission

Posted on:2016-03-27Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhouFull Text:PDF
GTID:2308330473956579Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
This thesis describes the hardware design of a system features with small size, high cost performance, excellent universalness, which can realize high speed signal processing, storage and transmission. The hardware architecture: Spartan-6 series FPGA serves as control unit, Kintex-7 series FPGA serves as signal processing unit and can be replaced by multiple models, 512 Mbit DDR2 and 512 Mbit Nor Flash serve for storaging linux os which runs at Micro Blaze soft processor of Spartan6 FPGA, up to 8G DDR3 serves for storaging data which processed by Kintex-7 FPGA. Kintex-7 FPGA can be configured via several method such as master serial, JTAG, its I/O interfaces which decoupled by FMC which can be used as function extension such as AD/DA and RF. Moreover, the platform contains flexible optional clock architecture and various interfaces such as 10/100/1000 M Ethernet, QSFP+, USB3.0, UART.Firstly, we describe the requirements for high speed signal processing, storage and transmission in each field. Then, we review the development of processor, memory, bus technology. Then, we introduce current products of leading signal processing platform vendors and illustrate the significance of designing the hardware platform.Secondly, we propose the function and performance requirements of the platform according to some application scenes such as MIMO, OFDM in communication, and design the hardware architecture(include data flow diagram, control diagram, clock tree diagram of the system) and chose the core chips and mechanical structure of the hardware platform based on it. Then we evaluate the power consumption in extreme conditions and fulfill thermal design.Thirdly, we design the circuit of every function module include FPGA, USB Controller, Ethernet PHY, Memory, Clock and the power supply. Then, in order to ensure the signal integrity of this high speed platform, we introduce how to design the Layer stack,how to place chips on board, and the constraint for routing.Finally, we test the fuction of every module. We list the required environment of hardware and software for test, and focuse on describing the method for testing interface which used for storage and transmission. The results show that the function of Gigabit Ethernet MAC layer is normal, the equivalent frequency of DDR2 reach 625 MHz, and DDR3 can reach 1066 MHz, the data rate of optical interface can reach 40 Gbps, USB can reach 640 Mbps.In all, this platform has powerful signal processing, signal cache ability, and it has universal and high throughput interface. Besides, it has flexible configuration method and easy to execute hardware upgrade and expansion. We can use it in application field such as MIMO, high speed optical network, phased array radar and etc for algorithm verification.It has broad application prospect.
Keywords/Search Tags:small size, general, high speed, storage, transmission
PDF Full Text Request
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