Design Of Pixel For Single Photon Avalanche Photodiode Detector With High Detection Efficiency And Study On The Mechanism Of Dark Count Rate

Single photon avalanche diode(SPAD)is a most important part of SPAD detector due to many advantages,such as high responsivity,large avalanche gain,high photon detection efficiency,low power consumption.SPAD detecter has the ability of detecting a single photon,it has been used in several fields and has attracted the attention of researchers at home and abroad.With the rapid development of single-photon detection technique,people on the SPAD detector performance requirements continue to increase.It is a common goal for the researchers to obtain a single photon avalanche diode detector with good performance,low noise and high integration in deep submicron(DSM)CMOS technologies.Single photon avalanche diode detector pixel consists of three parts,SPAD,quenching-reset circuit and counting circuit.In this thesis,a SPAD detector pixel is designed from the aspects of high performance SPAD and high SPAD pixel filling factor.The specific research content is divided into three parts.Firstly,the research on the mechanism of dark count rate,a dark count rate model is proposed to analyze the mechanism of dark count.Based on the deep submicron CMOS technology,this thesis makes a deep research and analysis on the mechanism of the DCR,and puts forward the calculation model of DCR based on the tunneling effect and the carrier thermal generation.The innovation of the DCR model is that the value of the mechanism of dark count rate can be calculated separately.The mechanism of dark counting is divided into three aspects: thermal generation,trap-assisted tunneling(TAT)and band-to-band tunneling(BTBT).Research results show that the TAT is dominant cause for the DCR generation of SPAD,but with the increase of the doping concentration in the avalanche region BTBT will gradually become the main mechanism for DCR.Secondly,on the research of the SPAD structure,a buried layer protection ring SPAD structure with high photon detection efficiency is proposed.Photon detection efficiency(PDE)is an important performance parameter of SPAD.In this thesis,a high-photon detection efficiency SPAD with deep P-well is proposed in 0.18 ?m CMOS technology,which is protected by surrounding P-implantation layer,P buried layer and P+ buried layer.This is the first time to use the buried layer structure to prevent premature edge breakdown and increase the avalanche area for improving PDE of SPAD.The results show that this SPAD achieves a high peak PDE of 34%,while DCR is below 87 Hz at 3V excess bias voltage in room temperature.Finally,the design of peripheral circuit,a quenching-reset circuit and a counting circuit are proposed with simple structure,good performance and small layout area.Based on the SMIC 0.18?m CMOS technology,an active quenching-reset circuit and an analog counting circuit are designed.Quenching-reset circuit with simple structure can realize the function of active quenching and resetting.Count circuit provides linear count functions and achieve 9.5 bits of linear counting range.The innovation of the counting circuit is that replacing the traditional ordinary counting capacitor with MOS capacitance to reduce the layout area.At last,the layout area of the counting circuit is reduced to 16?m × 14?m,which is about 2 times smaller than the conventional analog circuit and 10 times for digital counting circuit in the same count range.And the filling rate of the SPAD pixel composed of this counting circuit is about 60%.