TIADC System Time Skew Error Correction Algorithm Research

With the higher and higher demand of the sampling rate, Time interleaved analog-to-digital converter is a kind of effective method, it can ensure the sampling precision of the single channel ADC, at the same time significantly improve the system sampling rate. But the channel mismatch errors including gain error, offset error and time skew error which exist in TIADC system seriously affect the performance of the system, therefore, correction of TIADC system channel mismatch error has become a research hotspot.An error correction algorithm based on the perfect reconstruction and a full parallel implementation struction of the algorithm are presented. Through consulting a large amount of literature, basic principle and error theory of TIADC system are studied and analyzed. The design of correcting filters are the key of error correction algorithm, The weighted least square method which is used to improve the algorithm, and the improvement at the implementation structure, make the algorithm not only guarantee the performance but also be able to apply to higher frequency range.Referring to the research on correction algorithm, the research of error estimation algorithm has been carried on at first, and the channel mismatch estimating method which is based on sine fitting method has been adopted. Then calibration filters design based on the perfect reconstruction are given, on the basis of the least squares method, using the weighted least squares optimize the correction filters, make the system performance improved greatly.Referring to the research on correcting circuit, the full parallel strcture has been adopted, and serial-to-parallel converter has been ultilized to realize the speed reduction of high-speed data, and then filter polyphase decomposition technique has been used to construct filters array to calibrate the time skew error which is real-time, so that it can improve the throughput of the circuit.Finally, a four channel 12bits 800MSPS TIADC system based on the FPGA has been realized. The correcting circuit is easy to implement and has achieved high performance. In addition, the simulation results and analysis, which is performed on Modelsim and MATLAB, indicate that TIADC system performance with correction has been greatly increased compared with the TIADC system performance without correction, and the four channel system meets the design requirements.