Structure Design And Experimental Research Of High Voltage RF Power LDMOS Transistor

Radio frequency LDMOS is widely used in applications like wirelesscommunication and radar due to its high breakdown voltage, large gain, simpleprocessing, etc. Up to now, RF-LDMOS has experienced eighth generations withceaseless progresses of device structure and processing. The development of LDMOS inour country is far behind the word’s state-of-the-art technology. Because of itsimportance on the society, the research on LDMOS is urgent and of great significance.This thesis aims to design the high voltage RF-LDMOS and experimentallyrealize it. This thesis proposes a double-shield trench sinker LDMOS structure anddesigns the fabricating process. The trench sinker effectively reduces the device area,enhances the power density, and also cut down the heat budget during processing. Thedouble-shield structure not only optimizes the surface electric field in the device, butalso reduces the gate-to-drain capacitance, thus enhancing the maximum frequency.Computer simulation by Silvaco TCAD tools is implemented to design thestructure and process parameters. The doping concentration in p-base region, that indrift region, the length of drift region, and the gate length are carefully studied in orderto understand their influence on device performance. The optimized parameters areachieved after comparison and analysis.Self-heating and hot carrier are studied via simulation as well. The results showthat they exert a manifest influence on threshold voltage, on-resistance, etc. Theproposed device structure largely eliminates these effects as a result of the optimizedsurface field.The design of the proposed RF-LDMOS and its ESD protection circuit isaccomplished in UESTC, and then the fabrication is completed in Huahong NEC Corp.on the0.35m line. A cut-off frequency of5GHz and a breakdown voltage of97V areachieved experimentally, which satisfy our demands.