Reserach And Implementation Of Digital Intermediate Frequency On 10Gbps EPoC Systerm

The combination of television networks,telecommunication networks and the internet networks is the key foundation of network infrastructure construction and development in China.In Triple play,in order to meet the demands such as multi-service support,strong Qo S,multi-terminal access in family and high bandwidth,EPo C as the development direction of the next generation of broadcast can retrofit broadband networks on hybrid fiber coaxial network and build high-speed HFC networks.In order to achive high transferring speed demand,this paper mainly studies digital IF technology on 10 Gbps EPo C prototype system.This paper mainly studies the design and implementation of digital IF on 10 Gbps EPo C system.The paper uses poly phase filter technology and parallel DDS frequency synthesizer technology.The paper carefully studies and analyzes the design,simulation and implementation of these key technologies.The mainly works are below:(1) Study poly phase filtering techniques in the digital IF.And design algorithm applied to EPo C prototype system.Analyze and simulate it to verify the performance of the algorithm.The system can support two modes which are 48 MHz and 192 MHz modes.Each transmission and reception EVM prototype index is less than 0.5%.And implement the digital IF design of EPo C system on FPGA.Design the parallel DDS frequency synthesizer algorithm of digital IF carrier module.Do simulation and analysis of the performance of the algorithm on the Matlab.The design can support IF frequency from 5MHz to 1536 MHz.The stray of the design is more than 60 d B.Implement the digital IF carrier modulation and demodulation module on FPGA.(2) According to the EPo C system design requirement,sum up the design of interface modules.Implement the interface modules on FPGA including data transferring module with BB board,ADC and DAC interface module and SPI interface module.The data transferring rate is 10 Gbps which can meet the demand.(3) Integrat the digital IF signal processing codes.Build the test platform for EPo C RF front-end prototype system for testing and analysis.The test results show that all the index reach the RF front-end prototype design requirements.The total transmission and reception EVM prototype index is less than 1%.The EPo C system achieve 10 Gbps transferring rate up to demands and the spectral efficiency is 8.6 bps per Hz.These conclusions verify the design of digital IF signal processing system of the RF front-end prototype system for EPo C in the paper can meet the high-speed trans-mitssion requirement.It contributes to the development of EPo C system in China.