Design And Realization Of High-stability Digital Frequency Synthesizer Based On AD9548 And GPS

The frequency stability of frequency source system is a very important target aim for communication system. Long-term stability and short-term stability of frequency source system are defined by the sampling interval in testing process. In practical application frequency source system needs to have both excellent long-term stability and short-term stability. This dissertation aims to realize such a highly-stable frequency source system.Because the 1PPS signals received from GPS satellites have good long-term stability and the frequency signals of local oscillator have good short-term stability. This paper design a GPS-based high-stability frequency synthesizer, combines the characteristics of OCXO and 1PPS to achieve a high-stability frequency source.This thesis analyses the GPS frequency calibration principle and PLL principle, introduces the application of DPLL in high-stability frequency synthesizer and the previous lock system, and proposes a high-stability frequency synthesizer design in which AD9548 directly locks the 1PPS.The design employs C8051F310 as the controller of the system to configure AD9548. The 1PPS signal from GPS receiver must be processed by CPLD(EPM3064A) to be used as the reference signal of AD9548. The DPLL in the AD9548 directly locks the output frequency of DDS after division to the reference signal, makes real-time correction on the output of DDS to achieve the high-stability output of the system.Compared with the previous systems, the present design is characterized by such advantages as simple structure, low cost and compact construction. Through the practical testing, the output of the system has these merits: low spurs, low phase noise and high-stability. The properties of the system match the project demands.