A Study On The Modeling Of SOI MOSFET Based On PSP Extended

As the device feature size shrink to sub-100 nm, bulk CMOS has met a series of new problems and challenges. Increasing short-channel effects(SCE) and junction leakage current make the bulk CMOS technology to be difficult to follow Moore’s Law. SOI technology because of its full dielectric isolation, has many incomparable advantages than bulk CMOS technology such as eliminating the latch-up of bulk CMOS. Although BSIMSOI as a standard model for SOI, too many parameters and complex extraction processes are still unable to meet the needs of users.The main purpose of this thesis is to look into deeply the device structure, mechanism and device models of SOI MOSFET. Considering the physical effects of SOI, the result of the research is applicable to SOI MOSFET surface potential model on the basis of the bulk silicon standard model PSP103. The main work of the research are summarized as follows:(1) The device structure and mechanism of SOI MOSFET are elaborated in details. The thesis analyses not only the device characteristics of SOI MOSFET, but also both sides of SOI MOSFET, laying the foundation for the study of the future SOI MOSFET models.(2) Integrated with the floating body effect, self-heating effects and body contact model of SOI, the PSP expended model of SOI MOSFET is established on the basis of the bulk silicon model PSP103.(3) According to the existing test conditions and device technology, the test program of DC, AC characteristics and the S-parameter of small signal is put forward.(4) The extraction process of PSP model is optimized with the test data of DC, CV. The establishment of Global DC model is based on the process of the Local-Global parameter extraction in the SOI PSP expended model.(5) The research analyses the RF model of SOI MOSFET, and puts forward an extraction method of RF parasitism, substrate network particularly. It’s best to select an appropriate test program to extract the parasitism of the substrate of SOI MOS varactor. According to the actual process and extracted parasitism, the thesis makes a study about the relationship between the parasitism of the substrate and the size of the zoom. The scaling relationship of the substrate parasitism and the size is directly applied to the SOI MOSFET, and extraction of the rest of the parasitic parameters. Studying the size scaling of the extractive parameters, the research establishes a Global RF model.(7) Compared the measure data and simulation result of the DC MOSFET and RFMOSFET, the thesis verifies the feasibility and accuracy of SOI MOSFET RF scalable model based on PSP expended.