The Signal Acquisition System Design Of OTRD Based On FPGA

OTDR (Optical Time Domain Reflectometer, optical time domainreflectometer) is a kind of optical fiber measurement instruments, it based onthe Rayleigh scattering loss of optical fiber delay information to calculate thelength of the optical fiber positioning, according to Finel reflection eventlocation, is indispensable to the field of optical fiber communicationmeasurement and maintenance of equipment. At present, OTDR not only has alarge dynamic range, small blind area, high resolution performance, but also hasthe strong ability of data exchange and rapid data processing ability. As theOTDR signal acquisition system is the main part, undertakes the importantfunction of acquisition, storage, transmission and processing of OTDR returnoptical signal. With the performance requirements of practical engineering ofOTDR is more and more high, OTDR is also put forward higher requirementson the signal acquisition system.In this paper, based on the principle of OTDR and the data acquisitiontechnology research, in view of the current direction of development of OTDR,in order to realize the high speed signal acquisition, data storage andtransmission, high speed seamless improve signal-to-noise ratio as the goal,puting forward a kind of FPGA optical time domain reflectometer signal acquisition system. The system uses Altera’s FPGA chip EP4CE40F23C8N asthe core control chip, the use of fast digital low power high performanceanalog-to-digital conversion chip AD9230, the data acquisition system ofstorage and high-speed data transmission and real-time requirements, datastorage using ping-pong operation uses two SRAM ISSI61LV25616memory,USB interface, and PC data transfer, finally realizes the optical time domainreflectometer signal acquisition system.Both hardware part and software part compose the system. The systemhardware design includs the FPGA module, the signal receiving and processingcircuit module, analog digital conversion circuit module, data storage module,USB interface module, clock and power circuit design and circuit module, themodule is introduced. The design of system software includs PC and FPGAlogic function design and PC signal linear accumulation. Among them, theFPGA logic design is divided into two parts: the AD control module, FIFObuffer module, storage control module, USB interface control module, the statetransition diagram of each module,and the RTL.The various modules of thefunctional simulation using modelsim software. The signal processing part ofthe linear summation algorithm, using Matlab software to design the graphicaldisplay interface and realize the simulation of linear accumulative algorithm.