Design Of Multi-channel GNSS Received Signal Processing Platform

In recent years, with the development of technology, the demand for the high performance of positioning communications on the Global Navigation Satellite System(GNSS) is increasing. GNSS receiver is developing from the traditional single-channel single-mode to multi-channel multi-mode, and even co-locating, which will lead to great challenges for hardware implementation. Hence, it is of great importance to have a widely studied on the Multi-channel GNSS received signal processing platform for multi-channel multi-mode satellite navigation technology.In this paper, a 10-channel GNSS received signal processing platform is designed by the structure which including high-speed ADC, FPGA and DSP. The platform introduced above is compatible with low-IF, zero-IF and superheterodyne RF front-end output signal, and can achieve the performance of real-time GNSS signal acquisition, tracking, positioning, as well as support the research and testing on complex algorithms.The main contributions of this thesis can be summarized as follows.Firstly, the functional structure of the platform is designed, which is divided into three functional modules including signal acquisition, signal demodulation, signal resolution and control. The structure which including high-speed ADC, FPGA and DSP is used to select the main chip by analyzing the performance and functional requirements of each module.Secondly, according to the requirements of GNSS signal processing, the circuit of the platform is designed based on the electrical characteristics and specifications of each chip input and output interfaces. The ways to improve the part of the circuit are explored, such as improved daisy chain debugging circuit, single-ended and differential compatible input interface.Thirdly, the theories of the signal integrity, power integrity and electromagnetic compatibility are applied to the design of 12 layer high-speed PCB. With the simulation of before layout based on the practical environment, traversing the various layout scene reflection, crosstalk and EMI, and then the best layout scene, as well as the requirements are gained. The simulation after layout is done, and therefore the physical design platform is completed.Fourthly, carefully studying on the underlying operations of DSP and FPGA, combing the configuration process of each module, and calculating the various configuration register parameters based on timing constraints and functional requirements of high-speed traces, and then the driven design of DSP and FPGA is accomplished, which includes high-speed bus interface drives, USB transmission interface drives.Fifthly, the hardware and software is tested, including power, clock, ADC sampling channels, communications between FPGA and DSP, communications between platform and PC. And transplant Compass II and GPS positioning program to the platform and validate the platform.