Research On SAR/InSAR Sar Real-time Signal Processing Based On FPGA And ADSP

Synthetic Aperture Radar(SAR) can achieve two-dimensional high resolution imaging of object scene, by compressing two-dimensional pulse of the echo signal. It breaks through the limitation of azimuth resolution of traditional real aperture antenna, and has the ability of wide-swath high-resolution imaging for all-weather conditions day and night. By adding several number of auxiliary antennas to the interferometric SAR array, Interferometric SAR(In SAR) can realize three-dimensional imaging of the observation scene and achieve accurate Digital Elevation Model(DEM). In recent years, In SAR has become a hotspot in the SAR field.In the SAR/In SAR real-time processing system, it is essential to design an excellent hardware implementation solution,because of mass data, particularly fast data transfer rate and other complicated arithmetic operations. This thesis makes a deep research on the characteristics of the real-time signal processing for the single-pass and short-baseline In SAR system, which works on a high speed motion platform. Moreover, this paper analyses and optimizes the processing algorithms of all SAR/In SAR technologies, based on the existing outcomes. In order to meet the real-time requirements of the system, a hardware implementation solution based on FPGA and ADSP for real-time signal processing is presented. Two pieces of FPGA, which are connected by LVDS ports, are used to implement the fixed-point SAR imaging with R-D algorithm. Besides, three pieces of ADSP-TS201,which can communicate with each other by the high-speed link mouth coupling, can realize the In SAR signal processing of floating-point data.In consideration of the characteristics of the high speed motion platform, this dissertation briefly discusses the imaging processing of SAR/In SAR firstly, and then proposes an optimized program design for hardware mapping of SAR imaging based on FPGA. In order to solve the problem that signals may plus or minus 1 in FPGA internal transfer process, owing to the excessive resource consumption in the program designing process, a program re-optimization designing plan is proposed, based on on-chip resources optimization. Thus can ensure the stability and effectiveness of data transfer.Finally, for the optimized In SAR program designing, this thesis proposes a hardware mapping project, which utilizes the Ping-Pong buffering mode of the kernel storage resource within the ADSP. The project uses DMA to realize the high-speed data exchange between the kernel and external SDRAM, thus achieving high accuracy In SAR signal processing for large amount of data. Verified by simulation data, the designed real-time processing system can meet the performance required, and achieve high-precision DEM data.