Design And Implementation Of The UClinux-based Remote Update System Of FPGA

Common FPGA which bases on SRAM technology would lead to configuration data loss when powered down, after re-power, it needs reload configuration data from the off-chip memory, such as EPCS, Flash or other non-volatile memorys. Additionally, when the FPGA design contains a Nios II IP core and a memory interface to form a embedded system, users could also write the system software data into the same memory device using in-system memory access method, hardware designers just need to set the Nios II IP core reset vector parameter according to the system software storage area in the memory to cause the system to load the software automatically to run when FPGA configuration is complete. This unique working way of FPGA provides users a remote-update method for the FPGA-based embedded system which contains a memory interface, a remote communication interface and a reconfigure trigger i/o interface.This subject is based on the scientific research fund project "Net. M Core programmable Gigabit network multi-core processor" of Shandong University. From subject needs analysis, scheme design, hardware design to the migration and application development of uClinux system, it has detailly introduced and basically implemented a FPGA remote-update technology based on uClinux operating system. In system testing, the "The Remote-update System of Stratix IV GT 100G development platform" application has provided developers a worth reference and transplantation module in the GUI application development of the top management CPU in the Net.M Core processor architecture. In a word, this subject has a good reference value whether for the late development of the Net.M Core project or some other research amd development of related or same technologies.