Research On Multiple Memristors-Based Serial- Parallel Circuits And Neural Networks

With the advent of the big data era, the complexity of signal processing has been deepening, and the amount of information has been increasing. Meanwhile, the narrowing of the transistor is about to reach the limit state, and the development of many fields based on the modern electronic circuit technology has encountered obstacles. As a widely used nonlinear network, artificial neural network (or neural network for short) which possesses huge potential in terms of large scale real-time signal processing and realization of integrated circuit, has been also facing the same issue. Fortunately, the participation of the proposed nano-scale memristor with natural memory effect and the small world with superior topological structure makes a significant contribution to the implementation of the next-generation artificial intelligence neural networks. The novel network has advantages of simple structure and flexible application. Additionally, on account of the nanoscale memristive device, the size of circuit will be greatly reduced and the integration density of system will be significantly improved.In this paper, a detailed study of memristor, neural networks and small world network is presented. Then effective combination mechanism of these three is proposed. Next, composite behavior of the serial-parallel connections of HP memristors are investigated, and the composite characteristics are further applied into the digital image processing. Moreover, the memristive components are used into multilayer feedforward small world neural network and small world Hopfield neural network. The effectiveness and validity of these two networks can be finally verified by a series of application experiments of PID control and digital recognition, respectively. Specifically, this paper includes four parts mainly as follows:(1) Based on the classic HP memristor, the mathematical closed-form charge-controlled and flux-controlled HP memristor nonlinear models are presented. In particular, these models are more realistic by taking the nonlinear dopant drift effect nearby the terminals and the boundary conditions into account by adding a simple and effective window function. Furthermore, based on the internal parameters of the memristor, the theoretical derivation and numerical analysis of the memristor-based series-parallel connection circuits have been made comprehensively. For the sake of obtaining the characteristics of the memristor-based combinational circuits intuitively, a graphical user interface (GUI) is designed based on MATLAB software, which is beneficial to display the properties of the memristive system clearly.(2) According to the composite characteristics of the memristor series-parallel circuits, we propose to implement the mapping function required in image processing with the memristor-based combinational circuits. Finally, the reported simulations have demonstrated the effectiveness of the proposed scheme by several conventional applications including image reverse, contrast stretching and gray-scale adjusting.(3) A mathematical closed-form charge-controlled memristor model is presented with derivation procedures, which is an essential block for realizing the memristive synapse and the activation function in electronic neurons. Furthermore, we investigate a more intelligent memristive PID controller by incorporating the proposed memristive feedforward small world neural network (MFSNN) into intelligent PID control based on the advantages of the memristive MFSNN on computation speed and accuracy.(4) A novel systematic design of associative memory networks is addressed in this paper, by incorporating both the biological small-world effect and the recently acclaimed memristor into the conventional Hopfield neural network. More specifically, the original fully-connected Hopfield network is diluted by considering the small-world effect, based on a preferential connection removal criteria, i.e., weight salience priority. The generated sparse network exhibits comparable performance in associative memory but with much less connections. Furthermore, a hardware implementation scheme of the small-world Hopfield network is proposed using the experimental threshold adaptive memristor (TEAM) synaptic based circuits. Finally, performance of the proposed network is validated by illustrative examples of digital recognition.