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Study On Dual Gate Insulator Layers Of DG MOSFET

Posted on:2016-04-15Degree:MasterType:Thesis
Country:ChinaCandidate:D WangFull Text:PDF
GTID:2308330461490512Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The size of MOSFET must be decreased with the rapid development of information technology, which makes the integration level of the integrated circuit improved. Although the decreasing of the size can effectively improve the integration level and large information storage, but many kinds of harmful performance follow. These harmful performance can be depressed effectively by designing the new structures and new technology. At present, there are three main ways to solve these problem:firstly researching some new theoretical model, secondly optimizing design, thirdly researching new semiconductor materials and new device structures. This paper designs a new device structure and researches some correlation characteristics by building model and simulation, and analyses the characteristics of four kinds of DI structures with the difference(As) of dielectric constants(s).This paper designs a new DI(Dual Insulator) by using the Δε materials instead of normal GI(Gate Insulator) and four kinds of DIDG MOSFET with four kinds of DI. The research shows that firstly DIDG has two maximum value of electric field and DG has only one; secondly this extra electric field can make the DIDG’s average value of electric field larger than DG’s; thirdly the DIDG’s average value of electron velocity is larger than DG’s, but the DIDG’ value of electric field is lower than DG’s near drain, which indicates that DIDG can suppress HCE effectively than DG. The simulation of ID-VDS characteristics and ID-VGS characteristics shows that DIDG has lager leakage current, lager load capacity, better saturation current in the saturation region and more effectively HCE suppression, which compared with normal DG. With the increasing of the Δε, DIDG has lager value of electric field, more uniform electric field distribution, better ID-VDS characteristics and ID-VGS characteristics, lager leakage current, lager load capacity, more effectively SCE suppression, lager threshold voltage, lower sub-threshold slope, better switch performance, lager average value of electron velocity and lager value of current density.The Δε design inspires that Δε ratio can be design to research the four kinds of DIDG MOSFETs. The design shows that larger value of electric field, more uniform electric field distribution, lager leakage current, lager load capacity, better saturation current in the saturation region, more effectively HCE suppression, lager average value of electron velocity and lager value of current density with the decreasing of As ratio(3:2â†'1:1â†'2:3). The different Δε ratio simulation shows that the value of Vth is lager with decreasing of Δε ratio. So the value of Vth can be regulated and controlled by designing the Δε ratio.This paper designs the potential minimum, and the ID model and the Vr mode are designed based on the potential minimum model. The simulation shows that the models are designed excellently.
Keywords/Search Tags:DI, Dielectric constant, Current model, Threshold voltage, SCE
PDF Full Text Request
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