The Key Signals Simulation And Analysis Of DDR3 Based Kinds Of Softwares

Nowadays, the application of DDR (Double Data Rate) chip is becoming more and more widely with the rapid growth of information. Because of its data transfer rate and the working frequency improve step by step, and based on its structure of parallel bus, so there will be more interferences between adjacent signals, this makes the signal timing problem is becoming more and more serious, so the DDR system design must have high and strict demands to the timing.In this paper, three different softwares like Cadence,ANSYS and Sigrity,which are widely used in this field, have been chosen to make simulations respectively to make timing simulations and analysis based on DDR3 module of the actual circuit boards. First of all, this article introduces the working principle of the source synchronous clock signal, and the meaning of DDR3 key timing parameters and the requirements of the specification. Then through three different kinds of softwares to the simulation of DDR3 part on the circuit boards. Finally, compare the simulation and measured results of the three kinds of software with the industry standard JEDEC (electronic engineering design development association), by comparing the preparation work before the software simulation, the results of simulation and the precision of simulation with three different softwares, to get the advantages and disadvantages of three kinds of software about timing simulation, which is no doubt that provide the reference of the simulation and analysis to high-speed parallel bus for different occasions and different accuracy requirements, it also is a good reference for the DDR design of higher frequency.