Current DRAM-based main memory systems are starting to hit the power and costceilings. As an emerging memory technology, Phase-Change-Memory(PCM) has thepotential to become one of the alternatives comprising large scale main memory system,for its non-volatility, large storage density, low power consumption. A new hybrid memoryarchitecture, with DRAM caching PCM, has been proposed. The effectiveness of thisstructure needs to be verified, but the PCM-based hybrid main memory system is notavailable, so simulating such subsystem is a viable option.Firstly, we designed a hybrid memory controller that implements address mapping,the command generating, data exchanging between the DRAM and the PCM, etc. A writequeue has been inserted before PCM, to balance PCM high write latency.Secondly, we proposed a regular flush back strategy and a simple LRU replacementalgorithm, which can write DRAM pages back regularly and find the victim pageefficiently, leveraging the loss when the power is gone.Then, a fine-granularity strategy of metadata management is proposed, which puts themetadata together with the data, reducing the storage overhead.Finally, we built a hybrid memory simulation system and carried out verification.The results showed that, the hybrid memory system with1GB DRAM and32GBPCM improved the execution time by26%compared to the baseline8GB DRAM system,and by47%compared to the32GB PCM memory. |