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GrC-based Research On Rapid Optimization Algorithms For Combinational Logic Circuits

Posted on:2016-06-09Degree:MasterType:Thesis
Country:ChinaCandidate:H MaFull Text:PDF
GTID:2298330470451557Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
The optimization of combinational logic circuit is the key content ofcombinational logic circuit analysis and design. The mainly traditionaloptimization methods are formula method, the Karnaugh map method, Q-Malgorithm and its improved algorithm. It is mostly used in industry to designautomatically. But With the increasing of circuit scale and complexity, theoptimization of combinational logic circuit will face the challenge of big data.The traditional methods can be improved. Granular computing is an effectivemeans of dealing with large-scale and complicated problem. Using granularcomputing to solve combinational optimization problems in digital logic circuitis a new try and challenge.In this paper, we describe and solve the logic optimization problem fromthe angle of knowledge engineering. We apply granular computing to theoptimization of the combinational logic circuit. The idea of optimization ofcombinational logic circuit is converted to the rules of logic system extraction. Itchanges the thought of traditional combinational logic circuit optimization andobtains the right results faster. In addition, we expand the multiple inputs andsingle output (MISO) truth table reduction method into the multiple inputs andmultiple outputs (MIMO) truth table reduction method to improve efficiency.First of all, the equivalence relation model is set up to characterize the granulematrix. We use the matrix operations to find the possible solutions of multiple outputs in different granularity space at the same time. The heuristic knowledgein the granular matrix is used to reduce the search space. Based on the above, wedesigned a fast parallel reduction algorithm for multiple inputs and multipleoutputs truth table. In order to reduce computing space, we improve therepresentation of granular matrix and proposed a logic function reductionalgorithm for multiple inputs and multiple outputs based on granular computing.The matrix operations are converted to the statistical computing. It is helpful tosave computing time. We take the light-emitting diodes seven segment digitaldisplay for example to describe the detail of calculation process of the abovetwo algorithms. We prove the correctness and validity of the algorithm throughthe proof and the experiment result compared with Multisim software.Secondly, we combined the statistical properties of minimums and granularcomputing and proposed a reduction algorithm for multiple inputs and singleoutput logic function. We change the logic function into the form of the sum ofthe minimums and find the different size information granules in differentknowledge space. At the same time, the heuristic knowledge is used to reducethe search space. We can finally get the final result fast. We explain the concretesteps of the algorithm through a specific instance. The comparison result withMultisim software illustrates the correctness of the algorithm.Finally, we designed a simple logic function reduction system. The systemintegrates four algorithms proposed in this article and several traditionalalgorithms. A variety of input/output forms are designed for users to operate it.The methods proposed in this paper overcome the problems of computingredundancy, the high time and space complexity. It is more suitable forlarge-scale circuit logic reduction.
Keywords/Search Tags:logic function, parallel computing, circuit optimization, granularcomputing
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