The Research Of Sub-model Of MMC Digital Driver And The Sub-modular Simulation

At present, as the fourth generation of power electronics device IGBT isdeveloping rapidly, with the rapid development of the IGBT the drive and protectioncircuit is put forward higher requirements.Medium and high power IGBT need IGBTdriver separately, and the traditional driver adopts passive resistive analog circuits toimplement the gate control scheme, but it can’t change drive status when the IGBTwas changed, as the lack of generality, so this driver has its certain defects. Now in themarket as the driver is so expensive that cause the increase of the engineeringcost.According the operating characteristics of IGBT, this paper develop a variablegate-resistors design, this design can improve the switch speed and reduce the switchloss greatly. When the IGBT is in over-current or short-circuit condition, the voltagebetween collector and emitter is in the saturated zone and there can a reverse voltagebetween Power emitter and auxiliary emitter, by using these characteristics, the drivercan detect if the IGBT was in this kind of failure. When there came to a failure thedriver use drop gate voltage technology and soft shut off technology to protect IGBTfrom damage. When there was a high dv/dt, IGBT turn-off can produce large surgevoltage, may puncture of IGBT, this paper using active clamping circuit, this designcan slow down the rate of IGBT turn-off, prevent damage of IGBT.Secondly, this paper using a CPLD as its core to control the driver. Under the ISEenvironment, we design the general drive and protection program, and verify thevalidity of the drive protect sequence, finally using double pulse experiments verifythe feasibility and effectiveness of the drive.Finally, this paper describe the topology and operation principle of MMCbriefly,and by using PSpice to modeling the IGBT to study within the basicparameters,then according to the sub-modular working characteristic,this paperestablish the mathematical model of sub-modular of MMC，and verify the model bymade a model in MATLAB/Simulink.In the end, this paper establish the FPGA modelof sub-modular by using System Generator,and made a6level MMC model inMATLAB/Simulink, using co-simulation to validating the model.