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Theresearch Of Large-Capacity And Mixed-Signal Transmission

Posted on:2015-09-25Degree:MasterType:Thesis
Country:ChinaCandidate:X D ZhaoFull Text:PDF
GTID:2298330467463725Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Large-capacity mixed-signal has nice feature of compatibility in the signal system, high-speed signal transmission in the aerospace field is widely used. As a high-performance solution for high-speed signal transmission, LVDS supports the exchange of signals between boards and systems, in which a variety of low-speed signals are converted to high-speed LVDS signal, thus achieving error-free signal transmission by ASIC.LVDS is a very low voltage swing(about350mV) which can transmit data between two traces oron a pair of balanced cable through the method in two PCB.As we can see, the low swing and low current (typically3.5mA) output drivers achieve low noise and low power consumption. Since its good compatibility and high level of integration, however, due to the voltage difference is small, the signal vulnerable to external noise, electromagnetic interference, channel-fading effects, and LVDS’ transmission distance is limited. At present, many devices need to have long-distance transmitted data capability to the kilometer data transmission for subsequent storage or applications.Use AOC (Active Optical Cable-picture) to transmisson.Based on the advantages of low power consumption, high speed in exchanging data,and long-range, low signal attenuation characteristics of optical fiber,in this design, first converted to LVDS signal by forms of FPGA chip and secondly together with other high-speed image signal through the addition of FPGA systems, data strings, and finally using of fiber-optic high-speed long-distance transmission. In this paper,a send and receive system is developed based on fiber-optic to transfer high-speed to high definition CCD space camera data of huge amounts and high speed, long-distance transmission camera data signals. The scheme can accurately, send serial to parallel LVDS in high-speed and receive parallel to serial LVDS. The paper researches the key technology of clock and signal encoding. The synchronize and long-distance transmission difficult problem are resolved between sending and receiving. Finally, I complete the development and testing of hardware verification.
Keywords/Search Tags:FPGA, LVDS, hardware design, serial to parallel, parallel to serial
PDF Full Text Request
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