Design Of A High-Speed Serial-Parallel-Parallel-Serial Conversion Circuit With Anti-Irradiation Reinforcement

As space exploration becomes more frequent,more and more attention is paid to the stable high-speed data communication of electronic systems in space.The space environment is worse than the environment on the earth's surface,and the electronic components in the space communication system have higher requirements for reliability and environmental adaptability.At the same time,military equipment in various countries also has higher requirements for performance in extreme environments such as high and low temperatures and radiation.Therefore,the research on high-speed data transmission units with anti-radiation performance has important practical significance.The parallel-serial-serial-parallel conversion circuit,as an important part of the Ser Des chip(ie serial deserializer),undertakes the task of serializing or parallelizing data.The design result of this circuit directly affects the communication between the Ser Des sender and the receiver The speed and reliability of data transmission.Anti-radiation reinforcement methods are mainly circuit design reinforcement and layout process reinforcement.Among them,circuit design reinforcement can effectively suppress the influence of single event effect(SEE)on circuit stability,and layout process reinforcement can be achieved by suppressing total dose effect(TID).Ensure that the circuit is not damaged.In this thesis,the radiation-reinforced parallel-serial-serial-parallel conversion circuit is studied,and its performance is tested through circuit simulation,and finally the layout design is completed.Parallel-serial conversion circuit design adopts two-way serial structure,combining the advantages of serial structure and tree structure,and divides 10 parallel data into parity groups and converts separately,using 4:1 duty cycle clock frequency division signal As a selection signal,the conversion speed is faster and the area power consumption is reduced.The serial-to-parallel conversion circuit is designed with a two-way parallel structure,through the selection signal to generate odd and even two-way parallel data,and then combine 10 parallel data.In the simulation,an additional current signal is added to the circuit to affect the flip of the circuit node to simulate a single event transient pulse.From the simulation results,it can be seen that the circuit can work normally at a rate of 1.25 Gbps to verify that the circuit has high speed Radiation resistance under conversion.This design uses Cadence's Virtuoso tool for circuit and layout design,using SMIC0.13 um,1P5M CMOS process.