Design Of Analog Conversion System Of High Resolution Digital Video Based On FPGA

With the development of society and science technology, the digital imageprocessing technology has been widely used in aviation, aerospace, medical，communications and other fields. In some special occasions, we need to providebetter quality image using observations to better target.With the rapid developmentof programmable logic device technology, the integration of FPGA increase, and ithas parallel processing capacity and reconfigurable characteristics,.It has beenwidely used in real-time image processing.This paper designs a system of analog conversion and display of a highresolution digital video. We configure the camera parameter based on the research ofthe communication interface of Camera Link of digital camera. We build the frameof the video processing system, and put up with the method of hardwareimplementation algorithm for image interpolation reduced. Then we use Verilogcomplete the asynchronous clock synchronous processing module,data buffermodule,image minification module and PAL format conversion module, finally weput up with the improvement direction of the system.We finally choose the bilinear interpolation algorithm to realize image shrinkingaccording to the results of the comparision of image interpolation algorithms and thecharacteristics of the results and the actual FPGA chip. And then we introduce thehardware design of algorithm and program.Use Verilog to simulate each of everymodule.At last,we carry on the system test. The results show that this system hasstable performance,clear image and good real-time performance, it meet the needsof engineering.