The Design Of CABABC Encoder Based On FPGA

In recent decades, with the development of high definition and Ultra-high definitiondigital video, higher and higher requirements were proposed for video compressiontechnology. Although the original compression technology can also engaged in the codingof high definition video, due to the deficiency of its technology, the coding quality can’tfully meet the users’ demand. As a new generation of video coding standard, H.264notonly has excellent compression performance but also has very good network affinity.Compared to the previous video coding standards, it greatly improves the efficiency andquality of the video transmission.As the main technology in H.264, that the entropy coding performs well or not isdirectly related to the quality of the final image. H.264has two kinds of entropy coding,one is called context-based adaptive variable length coding(CAVLC) in the baseline profile,the other is called context-based adaptive binary arithmetic coding(CABAC) in the mainprofile. Compared to CAVLC, the compression efficiency of CABAC can be improved by9%～14%. But due to its high computational complexity and strong data dependence, thedesign of high speed and low power consuption CABAC encoder has always been a focusin the study of the researchers. Based on the summary and full understanding of previouswork, we propose a new type of encoder architecture based on deep study of CABACcoding algorithm. In binary and context selection model, we propose a general architecturethat can integrates four binarization methods together with a controller. We can reduce thecomputation complexity significantly in this way. In binary arithmetic coding module, byadopting double path storage and pipeline design, we eliminate the data dependence anddevelop the throughput with very low hardware cost. In normalization module, in order toreduce the computational complexity, we divide the whole process of normalization intoseveral child processes and put them into different pipelines. In this way, it ont only canhelp to reduce hardware area but also can speed up the encoding process.