Design Of A Camera Link High Speed Image Transmission System Based On FPGA

With the continuous progress of science and technology, CMOS image sensors isimproving the frame rate and resolution continuously, the speed matching problembetween the frame grabber and the imaging systems is becoming increasinglyimportant. Camera Link interface is a high-speed transfer of image data bus interface,which can effectively solve the problem of high-speed transmission between the framegrabber and the imaging system. Due to limited display range of the monitor, a largeimage can not be displayed on the monitor completely. This article is about the real-timetransmission system of large image which is based on the Camera Link protocol.This paper propose a scheme, which is based on FPGA chip and uses severalmonitors to display the large image in real-time.The program use FPGA as the maincontroller and design hardware circuit and software program for the large imagetransmission, which mainly include DDR2SDRAM chips used as a data cache unit andthe SDRAM Ping-pong buffer,and then the image is distributed in average and the datawas transmitted through Camera Link connector to the principal computer. Finally, thesystem was carried on by functional simulation and board-level testing, simulation andtest results show that the system can achieve high-speed transfer of image data.