The Design Of Video Player Based On SoC FPGA

The development and innovation of FPGA technology makes it a developmenttrend to integrate, blend and optimize the RISC processor and FPGA. Recently, theAltera Corporation combines with the ARM company in Britain, embeds theARM Cortex-A9MPCore in FPGA and releases the Cyclone V and Arria V SoC FPGA.SoC FPGA takes advantages of mass data high-speed processing of FPGA and theflexible programming of ARM, completes complementarity between the two and offersgreat serial and parallel processing capabilities. It exhibits superior performance insystems which needs complex algorithms and control logic.At first, this paper introduces the structure and performance of SoC FPGA, and theAltera SoC kit released by ARROW. On this basis, this paper introduces the softwareand hardware development environment and flow in detail. The flow above fullyreflects the hardware and software co-design ideas.Then, the ARM processor reads two video data from external memory and fulfilsthe video decoding with software. This design utilizes libmpeg2-0.5.1to decode theMPEG video. Users must import the whole library to be compiled with the project filesso that the files are able to call the library. Then the decoded data will be transmitted tothe DDR3connected to FPGA via AXI bus.At last, FPGA reads the data from the DDR3and processes the video, thebackground and the imige with the video and image processing suite provided by Altera.First, it converts the video data to the form of Avalon-ST video protocol, and convertsthe color planes via Avalon-ST interface with Color Plane Sequencer. The two videoconsists of the layer1and layer2. At the meantime, it reads the image data from theROM with the customized component and generates the background with Test PatternGenerator. Then, the Alpha Blending Mixer mixes the four layers of video, image andbackground. At last, the video is converted to clocked format by Alpha Blending Mixerand sends to VGA to be displayed.