Design And Implementation Of Link Core Based On IEEE1394b

The link core studied in this paper is a module of IEEE1394chip, it is mainlyresponsible for the data transmission between the transaction layer and physical layer,which sends data from the transaction layer to the physical layer and receives data fromthe physical layer to the transaction layer. The IP core complies with the IEEE1394bprotocol, it realizes the basic function of the link layer, and the maximum transmissionrate reaches800Mbps. It can be tapeouted alone or be made into an SOC product withother layers.Based on the analysis and research of the IEEE1394protocol, this paper mainlydescribes the working principle and structure of link layer, as well as the compositionand function of link core. According to the above analysis, the RTL level design ofIEEE1394link core is presented by means of the top-down method, and completes thedesign of each sub module. In order to ensure the correctness of the design, functionalsimulation of the link core is performed, which persents the simulation waveform oftransceiver asynchronous packet, isochronous packet, cycle start packet andacknowledge packet. The simulation results indicate that the design of the link corecompletely conforms to the IEEE1394standard, implements the main function of thelink layer and correctly performs data transmission, which proves the availability of thedesign of the link core.