Design And Optimization Of Adaptive FIR Filter Based On FPGA

Adaptive filter plays a vitally important role in modern digital signal processing area.The adaptive filter’s weights can be adaptively adjusted according to the statisticcharacteristics of the random signal. Thus, it can process the random signal effectively.Adaptive filters are widely used in different areas, and they can be summarized into fourcategories, i.e. system identification, inverse model, predicting and interference cancellation.For the applications with high speed and real-time restriction, adaptive filters are oftenrequired to be designed and implemented by hardware. Though hardware realization of theadaptive filter is much more complicated and higher-cost than software realization, theadaptive filter based on hardware has higher processing speed and is easier to meet therequirement of real-time. Besides, it can be optimized by many methods.In this dissertation, the adaptive filter which is based on FPGA and utilizes LMSalgorithm and FIR structure, i.e. the LMS adaptive FIR filter based on FPGA, is studied indetail. Then LMS algorithm is modified and pipeline technology or distributed arithmeticscheme is used to optimize this filter. This dissertation aims at solving the problem that howto map the LMS algorithm which has serial structure and is executed sequentially onto theFPGA platform efficiently. The research results are as follows.1. A certain amount of delay is inserted into the basic formulae of LMS algorithm, sothe sequential LMS algorithm is converted into DLMS algorithm which is executed parallel.To decrease the delay of the basic formulae of DLMS algorithm, the formulae and blockdiagram of DLMS algorithm are modified. Moreover, to improve the processing speed, theadaptive filter which is based on FPGA and utilizes the modified DLMS algorithm isoptimized by pipeline technology.2. The delay of the basic formulae of DLMS algorithm are specialized here, then thedistributed arithmetic scheme proposed in this dissertation is used to optimize the DLMSadaptive FIR filter based on FPGA. Compared with the traditional MAC scheme, theadaptive filter with the proposed distributed arithmetic scheme has the advantage of highprocessing speed and low consumption of FPGA hardware resources.3. Instead of LMS algorithm, signum-LMS algorithm is utilized to optimize theadaptive equalizer which is applied to channel equalization of communication system. Infact, signum-LMS algorithm is used to reduce the number of multiply operations, so theconsumption of hardware resources is decreased as well. Furthermore, pipelining is added to the rest of the multiplication module of the signum-LMS adaptive FIR filter based on FPGA,therefore the consumption of FPGA hardware resources is decreased while the processingspeed is slightly affected.