Critical Technology Research On Distributed And Parallel Simulation Of Massive Parallel SoC

Since the increase of frequency stopped, massive parallel system onchip(MPSoC),represented as chip multicore and manycore, has been the hotspot ofmicroprocessor research and design in recent years. According to Mooler’s law, thenumber of cores on a single chip will increase as quickly as the increase of chipresource. The thousands-core per chip era is not far away any more. As the number ofcores increases, the speed of traditional sequential simulators will degrade drastically.On the other hand, the design space of thousands-core processors is several times larger.Consequently, the efficiency of design space exploration will be very low. Computerarchitecture simulators, as an important computer architecture research tool, are facingserious challenges.This paper proposes a framework for distributed and parallel simulation(DPS) ofMPSoC. The basic idea is to exploit the parallelism that lies naturally in the targetarchitecture model with the parallel computing capability of the Cluster system. Theframework is built to improve the performance of serial simulator by changing thesimulation mechanism. On two challenges in DPS this paper focuses. One is theexecution efficiency of atomic instruction, the other is the simulation efficiency ofshared states.Because of the poor performance of lock methods, this paper proposes an efficientexecution technique of atomic instructions in parallel simulation based on instructionsemantics mapping(ISM). This solution makes a one-to-one atomic instructionsemantics mapping between target architecture and host architecture, to accomplish thesimulation of atomic instructions in target architecture by execute the correspondingatomic instructions in host architecture. It’s better than using lock in performance, has apromotion up to30%.This paper proposes an efficient simulation technique of shared states based onsoftware distributed shared memory (SDSM), to solve the problem of simulatingshared-memory target on non-shared-memory hosts. Two SDSM models are proposed,Host level model and Simulator level model. Experiment results show that, SDSMmethod can simulate shared-memory target correctly and efficiently in distributed hosts.Based on the simulation framework and distributed parallel simulation techniquesabove, a distributed parallel simulator DPFTsim is achieved on the prototype of FTsim.Experiment results show that, DPS framework, ISM method, and SDSM method canaccelerate the distributed and parallel simulation of MPSoC. Compared with sequentialsimulator, DPFTsim achieves a speedup of4.5, by starting10simthreads.