Research And Implementation Of GPS / BDS Dual - Mode Receiver Acquisition Algorithm

Currently, the Global Navigation Satellite System has been widely used in various fields.Other countries around the world have also started to develop their own global navigation satellite system. Meanwhile, due to the high positioning accuracy, anti-interference ability of dual-mode navigation system, in recent years the development of dual-mode receiver has become a hot topic. Research on missile-bornedual-mode GPS/BDS receiver is mainly to solve the acquisition of the satellite signal, to improve the availability of receivers in weak signal conditions.This paper will mainly focus on the key technology about the acquisition of dual-mode GPS/BDS receiver. And based on Verilog language, it’s implemented on FPGA platform.This part firstly describes the algorithm principle and implementation process of conventional signal acquisition algorithm. Then discussed three acquisition algorithms including the matched filter, acquisition algorithms based on FFT, as well as algorithms based on partial matched filter combined with FFT(PMF-FFT).Finally through comparing the advantages and disadvantages of these algorithms,the PMF-FFT algorithm based on coherent accumulation and non-coherent accumulation is choose which is compatible with several kinds of signals include GPS L1 C/A and BDS B1 I signal.Complete the design of multi-channels according to the specific situation of FPGA hardware resources. The components of the capture module in FPGA are introduced, and has carried on the narration to the realization of each module and simulation.Finally test display that can capture to the carrier to noise ratio for 29dB-Hz GPS signal, 32dB-Hz BDS signal,and the capture time acceptable range, the dual-mode acquisition to meet the design requirements.