LCD System Design Optimization Of Mobile Multimedia SoC Chip

With multimedia terminal equipment by the wider use of its embedded multimedia chip’s performance and power consumption requirements increasing. Considering the cost and price of chips, The paper study bus architecture, LCD controller, memory controller and data transfer mechanism related with the LCD system performace of the SoC chip. Against the LCD system stability, performace and low power, propose some optimized methods. On the one hand, improve the effective computing power and system data throughput. On the other hand, lower system power consumption.Based on this analysis, this paper proposes these methods on the AS3310 SoC chip. Study the key parts which impact LCD system performance. Against several design flaws or inadequate, propose the improved design. The main optimal design as follows:1) Against the original LCD display jitter problems resulted from bus arbitration mechanism, on the one hand, improve the design of the total structure. On the other hand, adopt a high-speed bus arbitration mechanism which supports multiple priority arbitration mechanism. The two part optimize make sure the display system stability.2) Aim at the software conversion from the YCbCr format to the RGB format data, this paper presents a supporting both YCrCb and RGB image data format LCD controller structure design. Besides, this paper achieves high performance SDRAM controller design. The design achieves the zero-lost cycles transfer and high efficiently completes the CPU visiting SDRAM. Two IP-accelerated video decoder optimized performance while saving memory space and CPU resources.3) For the LCD display low-power system design, this paper proposes the new hardware and software co-work to achieve system low power design. Through automatic hardware detection on the characteristics of the images, using pseudo-color display technology and Cache-Locked technology, hardware and software co-work achieves the LCD system low-power design. In the specific application of the system, thepower consumption is larger.The above performance optimize design are achieved based on FPGA. The optimize design achieved the expected results through comparing with optimize design and origin design by porting open-source Linux OS and open-source Mplayer on the system for verification.The low-power design is applied to one mobile multimedia soc chip. The soc chip has been manufactured by 0.18um technology. By the testing the ASIC chip, the low-power design can decrease the system power by 20%-30% for sure.