Research On The Reliability Of High-k/Metal Gate

CMOS integrated circuits have become the base of the modern information science and technology industrial. In order to meet the people’s needs of high performance, low power consumption and low cost of electronic products, the integration of integrated circuits is constantly improved, which makes the feature size of transistor get smaller and smaller.The channel length and the gate dielectric thickness decrease dramatically. The thickness of the conventional SiO2dielectric material has reached its physical limits, thus causing a sharp increase in the gate leakage current and power consumption. To overcome the problem of gate leakage current, the high-k dielectric of HfO2becomes the most suitable alternative materials; To solve the incompatibility issue between HfO2dielectric and conventional polysilicon gate, metal gate materials has also been applied to the gate structure. Thus, high-k/metal gate technology as a great revolutionary technology is introduced into the CMOS integrated circuit. But, the low crystallization temperature of HfO2itself, the poorcontact interface with Si substrateand the metal electrode and high concentrations of oxygen vacancy defects during the film deposition process cause serious reliability problems on MOSFET, especially on NMOSFET, when HfO2is used as a gate dielectric. Therefore, this paper mainly studies the reliability of NMOSFET based on the gate structure of SiO2/HfO2/TiN/TiAl/TiN/W, including the following several aspects:time-dependent dielectric breakdown (TDDB), stress-induced leakage current (SILC) and positive bias temperature instability (PBTI).(1) For the research of TDDB, the TDDB lifetime of the device at different voltages and temperature is analyzed. The E model is used to extrapolate the TDDB lifetime of the device under normal operating voltage; the voltage acceleration factor is1.59cm/MV; the maximum operating voltage is1.06V when working for10years. When the voltage stress is constant, the relationship between the temperature and TDDB lifetime of the device complys with Arrhenius; the calculated intrinsic dipole potential (po) of HfO2/SiO2is1.370eA; the intrinsic activation energy AHo*is2.274eV.(2) For the research of SILC, the SILC degradation under voltage stress is studied through testing and monitoring the SILC change at different sense voltage (Vg). Two trap-related SILC peak position have been observed. One is at-0.25V, the other one is at-0.8V～1.0V. By calculating the surface potential and the energy band at the two peak positions, the SILC peak located at-0.25V is caused by the neutral oxygen vacancy (V0) in HfO2dielectric layers, corresponding to0.51eV below Si conduction band minimum at the surface; the SILC peak located at0.8～1.0V corresponds to the interface traps located at Si conduction band near the surface. The trap generation rate at-0.25V is much larger than that at0.8～1.0V, which show the breakdown of HfO2dielectric occurs earlier than that of the interfacial SiO2, and HfO2is a major factor in determining theoverall dielectric degradation.(3) For the research of PBTI. Firstly, the PBTI degradation at different voltage stress is studed, the relationship between threshold voltage shift (AVt) and stress time satisfies the power law relationship; the exponent n is not affected by voltage stress; the AVt is exponentially increased with voltage stress, which can be used to estimate the PBTI lifetime under normal operating conditions. When T is125℃and Vg is IV, the PBTI lifetime of the device is3350s, which is far lower than the TDDB lifetime previously calculated.This implies that the device failure occurs prior to the gate dielectric breakdown in the high-k/metal gate based NMOSFET, because of the exceeding threshold voltage shift.Therefore, the PBTI degradation of high-k/metal gate is the main reliability limiting factor. Secondly, the PBTI degradation at different temperatures is analyzed.The relationship between the threshold voltage shift and temperature doesn’t obey the traditional Arrhenius; it should be dealt with segmentations according to the temperature range. When the temperature is lower than75℃, the activation energy of the PBTI degradation is0.04eV, which indicates that the PBTI degradation is affected by temperature weakly at low temperature region; When the temperature is higher than75℃, the activation energy of the PBTI degradation is0.23eV, which shows that the PBTI degradation is strongly influenced by temperature at high temperature region. Therefore, the impact of temperature should be considered in the PBTI lifetime prediction.