Research And Design Of M-PHY Transmitter

With the development of3G, LTE and4G communication standards, mobiledevices such as smart phones and tablet PCs growth explosively. People’s demands forthe performance of smartphone is becoming higher and higher, in addition to simplevoice calls and send and receive text messages, high resolution display, high pixelcamera and high speed data transmission are also needed. This requires great datatransmission capabilities of chips and modules. However interface technology now exitscannot meet the requirements of mobile devices to high speed data transmission and lowpower dissipation. Under this background MIPI alliance (Mobile Industry ProcessorInterface Alliance) introduced the M-PHY standard. M-PHY has higher data rates andlower power consumption compared with other standards. What’s more, terminalequipment has many modules such as memory, display, video and sound etc. that havedifferent interfaces, which cause great difficulties to device manufacturers. To simplifythe design and improve the compatibility between chips and modules, unified interfacestandards is a major trend. The MIPI alliance is an open membership organization,which objective to drive consistency in mobile application processors and peripheralinterfaces, promoting reuse and compatibility in mobile devices.Based on the M-PHY design specification the main circuits of the transmitter sideof M-PHY are analyzed and designed in this paper, the date rate is2.912-Gbps. At first,a high frequency clock generator is designed based on the theory of Phase LockingLoop, which includes PFD, CP, LF, VCO and Divider, their simulation results are givenin every section. Then by comparing the advantages and disadvantages of differentparallel to serial converters, a circuit structure combining the tree structure and parallelstructure is used to convert ten bits of parallel data to serial data, which decreases theoperating frequency of most circuit and reduces the power consumption while achievingfast conversion speed. At last, a driver circuit with high precision termination resistorthat is insensitive to process, power supply and temperature is designed by usingbandgap reference technique.SMIC0.13-μm CMOS mix signal process is used under a1.2V voltage supply toimplement the design. The simulation results show that all performance indexes meetthe M-PHY specification and design objective requirements.