Design And Implementation Of Image Processing Pipeline For GPU

With the development of computer graphics technology, people have become increasingly demanding image processing performance. Academia and company, therefore, is very concerned about the design of high-performance image processor, which has made progress in image hardware design technology. As the core of graphics card, GPU (Graphics Processing Unit) can not only achieve image acceleration and real-time processing, but also has developed into a highly programmable parallel processor. However, comparing to the international level, China’s independent intellectual property rights of GPU is almost blank, whose research and design of the GPU is just in its infancy section. The image processing is an important part of the graphics processor (GPU), which can implement the drawing of the image, copying, scaling, color replacement, pixel filter, and handling bitmaps and fonts. According to these problems, this paper carries out the research in the pipeline design of GPU image processing.This paper studies the pipeline design and implementation of GPU image processing. First, does in-depth study in a variety of image processing algorithms of GPU and OpenGL standard. And based on the study, an image processing algorithm is proposed, which is suitable for hardware implementation. Then, according to the image pipeline processing efficiency of GPU system, area requirements and the characteristics of the image processing algorithm, merge the common part of the process, to achieve real-time image processing functions. Finally, the design is verified in hardware and software co-verification method, which can do abundant verification for the various features of the design. The design is also integrated into the GPU system, to do the profound system-level verification.On the builted FPGA-based prototype system, we simulate this design by means of classical testing image, the results are comparable with the operation results of OpenGL. The image processing pipeline module has been verified on Xilinx(Virtex6-550T) development system:it uses1%of hardware resources of the Virtex6-550T chip, and the maximum working frequency is156.593MHz.