Design Of Electrophoretic E-paper Driving Chip Based On FPGA

With the promotion and application of electronic paper display technology,we are no longer strange to electronic paper.It is not only an alternative to paper, but also a kind of future display devices which has great potential for development.Electronic paper display technology is divided into many types,currently the most representative electronic paper display technology in the market is electrophoretic display (EPD),which accounted for90%of market.Because of its features of energy saving,no power to display a static image, no backlight,optical and mechanical properties of paper,wide viewing angle and reflective displays,now electrophoretics is applied widely,such as e-books and electronic shelf label system.In the near future,with the maturity and application of flexible e-paper and color e-paper technology,electronic paper display device will appear in every aspect of our lives.According to the inspection of related application and product,we can find that there are two ways to implement electrophoretics drivers.the one is use a dedicated driver chip of chip maker,MCU control electronic paper display by operating a dedicated driver chip,the other one is using software programming,MCU directly simulate electronic paper diver timing through the IO pins to implement electronic paper display.The solution of dedicated chip is often limited to a particular manufacturer’s product,the prices is high and the versatility is poor.And the method of use software programming to achieve drivers is take up too much MCU resources,resulting in degradation of system performance.To overcome the shortcomings of ASIC’s high cost and MCU resource waste using software,the article proposes the universal driving solution using Flash FPGA for EPD based on EPD’s specification and interface standard.It has developed the driven chip for different MCU interface and EPD products,using a modular design approach,and using Verilog HDL programming according to the Finite State Machine to integrate the soft IP cores which have certified by industrial applications,and the design of waveform is implemented as hard logic,It has achieved the satisfied simulation results by using the advanced design tools.The results of experiment tested on PCB,which is designed by ourselves,reveal the validation of the design,and it gets much better performance,much lower power consumption,live-at-power-up,no need for extra implementation costs.much lower costs and better compatibility.It has built good foundation for ASIC design,and it will get broadly market perspective for using with human-machine-interface devices like touch panel etc.