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The Design Of NFC Anti-counterfeit Chip And Verification On FPGA

Posted on:2015-03-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y Z YangFull Text:PDF
GTID:2268330428966669Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the emergence of NFC(Near Field Communication) technology, majormobile phone manufactures have added this technology into their latest products.NFCtechnology can be applied for anti-counterfeiting, therefore, based on the increasingpopularity of smart phones with NFC and the heavy demand of efficientlyanti-counterfeit capability, chips embedded in NFC anti-counterfeit systems appear tohave a promising market prospect.The article proposes a novel NFC anti-counterfeit system,which can helpenterprises against counterfeits and provide a anti-counterfeiting method toconsumers,then presented a design and FPGA verification about the anti-counterfeitchip’s digital module embedded in the system. Firstly, this article illustrates thestructure and operation principles, analyzes the NFC communication technology andNFC telephone technique relevant to the system.Secondly, the function of every unitin a tag has been researched, the structure and data stream of the digital module hasbeen defined, the design and simulation of Miller-decoder, data receive/send checker,Manchester-encoder, DES encrypt arithmetic and state machine has been made byusing Verilog HDL and Modelsim, the RTL level function verification about the wholedigital system was operated in NC-Verilog emulator under Linux environment. At last,to further enhance the reliability of the design, we have built the Eclipse&ADTplatform, used Java language to develop Android applying software, and synthesizedthe digital module by ISE targeted to the XC6SLX16chip of the Xilinx, thenaccomplished to validate the anti-counterfeit chip by FPGA and Android app.The digital module has been synthesized by the Design Compiler tool of theSynopsys with the0.35μm technology of Hua Hong NEC, the area is1221440.228516μm2and the power is2.0303mW, basing on the synthesized nettingtable, the layout of the digital module has generated by the SOC Encounter tool of theCadence. The result of FPGA verification indicate that the communication betweenanti-counterfeit chip and HTC A320e(supporting NFC) meets the requirements of thenovel NFC anti-counterfeit system.
Keywords/Search Tags:NFC, Anti-counterfeit Chip, Android, Application, FPGA
PDF Full Text Request
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