Font Size: a A A

CCD Data Acquisition System Implementation Based On FPGA

Posted on:2015-02-16Degree:MasterType:Thesis
Country:ChinaCandidate:Y LiuFull Text:PDF
GTID:2268330428966298Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
The21st century is the information age, information technology has brought to people’s daily life changed dramatically. The image sensor is applied to more and more of our daily life, such as a camera phone, and monitoring probes throughout the community on the road. The application of the results are attributed to ongoing research on the power of the image sensor technology. Research stage CMOS image sensors and CCD image sensors is relatively mature, than other relatively extensive. Which CCD image sensor with high light sensitivity, low noise, less pixels, etc. are widely used in image analysis, remote sensing imaging, precision measuring and industrial control and other fields. In this paper, the analysis of the current data acquisition system, make full use of FPGA’s low cost, high reliability, fast working speed and short development cycle and USB flexibility, speed, etc., based on the design of the linear array of FPGA and USB CCD image acquisition system. FPGA chip as the core control system, using Verilog HDL hardware description language design FPGA hardware timing generation system of internal logic to control the peripheral modules of the system. The system uses Altera’s FPGA-based controller StratixⅢ series designed linear CCD driver module, A/D converter driver module, FIFO control module, USB interface control module. USB2.0interface as the system uses the data transfer interface, the collected data is transferred to the PC.System hardware, linear CCD using Toshiba’s TCD1209D, digital-analog converter chip Analog Device’s special linear CCD chip AD9822, using Cypress’s CY7C68013A as the USB interface control chip. Software, using Altera’s QuartusⅡ integrated development environment. using Verilog HDL hardware description language designed linear CCD drive timing, A/D converter chip timing and driving Slave FIFO write state machine. Keil uVision2designed and implemented the USB interface controller chip firmware. The system PCB circuit board were designed and drawn by Altium Designer Winter09.By the final system hardware and software testing, the CCD can display the collected data and stored, in this paper show that the design is feasible.
Keywords/Search Tags:Data Acquisition, FPGA, USB, Linear CCD
PDF Full Text Request
Related items