Research On Low-power Analog And Mapping For NoC

NoC is dominated by the concept of a distributed interconnection network evolved, with the expansion of the scale of integrated circuits, low-power issues become increasingly prominent, forming a "Power Wall", power consumption has become a major bottleneck in the development of the current IC. IC developed to NoC, compared with traditional networks, power consumption is already constrained NoC design first thing to consider, especially for major issues handsets, providing the highest possible requirements for battery life, power consumption is of concern to the industry. So, NoC design should not only consider the traditional network latency problem with the first consideration, but also to consider their power consumption.This paper analyzes the basic theory of NoC, including the composition of the structure of the NoC, layered architecture, topology, switching, routing strategies and algorithms, design processes, performance evaluation. Secondly,this paper Analyses the power consumption sources of the NoC from the state of the circuit to NoC structure point of view, and analyzes the major NoC low power technology, established a NoC power model; This paper focus on the NoC mapping mechanism, given its formal mathematical model describes the mapping mechanism. Based on the research NoC mapping and power, the paper combined NoC communication power model and mapping model, established a goal to optimize the power consumption of the mapping model. Then, in order to speed up the search for the optimal solution mapping problem, this paper proposes a improved genetic algorithm NoC mapping algorithm based on genetic algorithm. By optimizing the initialization of the algorithm and genetic algorithm control parameters, while retaining the global search ability of genetic algorithm, to improve the convergence speed, low power consumption to achieve better results.Finally, a simple simulation results of the mapping data collection, the data show that the proposed improved genetic algorithm with the general genetic algorithm mapping compared with lower power consumption and faster convergence performance, low power for solving oriented consumption NoC mapping has better performance.NoC power redundancy problem is a complex problem, this paper proposes an improved genetic mapping algorithm for NoC low-power method,that can be used in conjunction with other techniques to reduce the power consumption of the chip in the future.