Research On Low Power Mapping Algoirthm For NoC

Processing unit mapping is an important part of NoC (Network-on-chip) design, themapping results have a significant impact of the hardware cost, network performance,the chip power consumption and so on. Traditional mapping algorithms, such as geneticalgorithms, ant colony algorithm, are slow convergence and easy to fall into localoptimal solution. So, how to obtain the optimal result in a reasonable period of time hasbeen a difficult problem in NoC design.This paper firstly introduces the concepts related to NOC, and based on the analysisof NOC mapping features, this paper establishment a communication power model forNoC mapping problem, and proposed a power-priority mapping objective function.Secondly, in order to quickly search for the optimal mapping solution, this paperproposed a particle swarm optimization simulated annealing algorithm. The algorithmcombines the parallel particle swarm optimization algorithm and simulated annealinglocal search ability, through the introduction of the new particle algorithms andMetropolis guidelines for further updates, the PSO-SA algorithm can be quicklymapped the lowest power solution.Experimental results show that when compared with genetic algorithm or standardparticle swarm optimization algorithm, the proposed particle swarm optimizationsimulated annealing algorithm have a smaller total traffic, a faster Convergence rate,and not easy to fall into local optimal solution, etc.In further research, a different topology or multi-objective NoC mapping problem isstudied, so as to enhance the algorithm’s adaptability.