The Design And Implementation Of Video Capture System Based On Intel SoC Processor

With the rapid development of electronic technology, techniques of video capture and digital image processing have been widely applied in various occasions. As a result, there are higher requirements for the performance and image quality of the video capture system. Since video capture systems act as front-end for various image processing systems, it is vital for them to provide stable and high quality video signal output. Traditional video capture system mainly uses ARM, FPGA OR DSP chip as the main controller. However, because of their relatively single functions, the closely integration of the entire video capture and processing system can’t be achieved, thus exerting negative impact on the video capture and processing system. Therefore, in order to meet the challenges of the market, it is meaningful to design a new video capture system which has high performance, low power consumption, strong scalability and portability.The emergence of SoC processor has changed the traditional way of video capture and provided new method for achieving high-performance video capture system. This thesis uses Intel SoC processor as the core device and designs a new video capture system, implement video capture and display functions. The system not only gives full play to the advantages of FPGA in terms of video capture and processing, and achieves a stable video output, but also gives full play to the advantages of CPU in terms of system control and display. In addition, the hardware part of this system is designed via Altera latest integrated development technology-Qsys, and conbines with the SoC built-in PCIe bus complete internal high-speed data transmission.The system uses Intel’s E645C SoC processor as the core device to complete the video capture circuit design of FPGA part. This part consists of video data extraction module, asynchronous FIFO module, video capture control module, I2C control module, video storage control module, DMA controller and PCIe interface module, etc. Besides, AVStream minidriver is designed to complete data communication with the FPGA. And eventually images can be displayed in real time through WES7operating system. The hardware part of the system is programmed by Verilog HDL language. It adopts Modelsim and Quartus II for simulation and debugging, and finally is downloaded to the FPGA for verification. As for the driver, parts of it are developed by Windows DDK, and are validated under WES7system. The result shows that the entire video capture system has high performance, low power consumption, strong scalability and portability. It can support for a variety of applications for video processing on WES7system. Therefore, this system can be applied in many areas of video capture and processing and has great market value. Besides, this article describes the application method of SoC chip and design flow of Qsys system, and has a certain reference value.