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FPGA Design And Implementation Of Phased Array Radar Signal Processor

Posted on:2015-02-23Degree:MasterType:Thesis
Country:ChinaCandidate:Q LuFull Text:PDF
GTID:2268330425988070Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the advantage of changing beam pointing quickly, suppressing interferences adaptively, active phased array radar has been widely used. The radar signal processor is an indispensable part in phased array radar. With the development of DSP and FPGA’s computing performance and memory resource, radar digital signal processing technology has achieved a rapid development.In this thesis, using a signal processing platform based on FPGA Kintex7and DSP TMS320C6678, the corresponding radar signal processing functions are realized in FPGA for an active phase array radar system. In high pulse repetition frequency pulsed doppler (HPRF-PD) mode, a match filter to wideband sum beam signals, a fast Fourier transform (FFT) processor to narrowband sum beam signals, and a range tracking pre-processor to wideband sum beam signals are completed. In linear frequency modulation (LFM) mode, a pulse compression processor, a moving target detection (MTD) processor for256coherent integration cycles to sum and difference beam echo signals are completed. In linear frequency modulation continuous wave (LFMCW) mode, a FFT processor, and a MTD processor for64coherent integration cycles to beat signals in positive and negative frequency sweep periods are completed. The data exchange between FPGA and DSP is achieved through high-speed SRIO.Finally, the correctness of each signal processing module developed in FPGA is validated, and compared with that in Matlab. The signal processing modules developed in FPGA also satisfies the real-time requirement in our radar system.
Keywords/Search Tags:Phased array, Radar signal processors, FPGA, match filter, pulse compression, FFT, moving target detection
PDF Full Text Request
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