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Design And Verification SATA Interface Controller Command Layer SSD

Posted on:2015-03-17Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhangFull Text:PDF
GTID:2268330425987785Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the advent of the era of Big Data, the traditional mechanical hard disk has been unable to meet the needs of users, due to the defects in terms of stability and aseismatic. There is an urgent need to replace the traditional mechanical hard disk with a new mass storage device. The Solid State Disk is such a storage device, with its high-speed transfer rate, advantage in earthquake resistance. Because of these advantages, people have focused their attention on it at once. The Solid State Disk is always connected with Serial ATA bus.Serial ATA is a high-speed serial communication bus, whose fastest speed can reach600MByte/sec. Supporting the hot plug, Native Command Queue, makes it replace the Parallel ATA, and take a great part of the mainstream of the market in the area of mass storage device. However, in our country this area is still in the initial stage of development, and no mature products can be found on the market. So it is really meaningful to study on Serial ATA bus.This paper first introduces the background of the researching in this area, and then followed by the analysis the Serial ATA protocol, including the physical layer, link layer, transport layer, command layer. Among of them, the command layer is the key point of this research work. After the study on the SATA protcal, the design framework of the SATA command layer is proposed, then a detailed design of the command layer control module and data transmit control module is carried out. After analyzing the performance simulation, one way for pipeline executing NCQ commands is designed also, which helps reducing the time of the interaction between hardware and software, and making a great improvement on executing the NCQ commands.Building the verification environment is another key point of this research work. The Universal Verification Methodology is used for large-scare random test and verification of the presented SATA design.
Keywords/Search Tags:Solid State Disk, SATA, Command Layer, UVM verification
PDF Full Text Request
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