The Design And Implementation Of32Bits SOC Based On MIPS

SOC (System on Chip) is a single chip which integrated MCU microprocessor, analog IP core, digital IP core, storage memorizer and input/output interface. In recent years, it is widely used in consumer electronics field, computer networks area, industrial control system, automotive electronics products and IC cards as well as other fields of explosive growth due to the advantages of mini extension, low consumption, low cost and high reliability. Traditional8bits SOC can not fulfill the requirements of these products in the demand of precision, fast response, and expandability. However,32bits SOC is extensively adapted in embedded system because of its best performance in fast response and friendly expandability.The paper design a kind of32bits SOC which can be applied in VOIP phones,3G routers and industrial control and other high technologies areas. The chip adapts MCU design of32bits Reduced Instruction Set which based on MIPS-X5core system of low cost, high performance, and stable structure. Meanwhile, the article standard TOP-DOWN chip design process, and integrate all the storage system such as SRAM, SDRAM, SPI FLASH, CACHE and so on. What’s more, the combining design together with storages and high speed DMA controller has greatly improved the capacity and the speed of storages, also integrate abundant interfaces based on MIPS core simplified structure.The chapter1and chapter2analyse the development of32bits SOC domestic and overseas, the backgroundof subject, overall architecture, and characteristics of internal bus.The chapter3describes storage structure of32bits SOC, including the design solution of SRAM, SDRAM, CACHE, SPI FLASH and DMA controller. All the design aims to improve the speed of storages.The chapter4, chapter5and chapter6present the data transmission, communication principle, and the design of architecture diagram of the peripheral equipment, such as UART controller, SDIO controller, USB controller and so on.The chapter7represents the entire simulation process, and analyses the simulation results. Moreover, the paper builds a hardware verification platform based on FPGA which usesStratixII EP2S180chip of large capacity and high performance, and accomplishes the hardware verification procedures. All the simulation results and FPGA verifications indicate that the article achieves prospective functional requirements.The chapter8is the recapitulative sum and prospect for next stage.