Flectromagnetic Analysis And Design Of3D Packaging For High-speed Circuits

With modern electronic product development cycles getting shorter, operating frequencies getting higher and higher, size becoming smaller and smaller, product structure becoming more complex, electromagnetic Interference (EMI), signal integrity (SI) and other electromagnetic problems in high-speed circuits system have become increasingly prominent. Today microelectronic packaging has entered the smaller, multi-functional, three-dimensional integration and heterogeneous integration times, three-dimensional packaging based on through-silicon via (TSV) technology has been developing rapidly for the advantages of its high-density interconnection and high fever machinery reliability. However, as the chip clock frequency gets up to several hundred MHz or GHz, the wave phenomenon along interconnect and inside packaging structures must be takne into account. High-frequency signal can easily pass through the silicon oxide layers via capacitive coupling between TSV and silicon substrate making it lose the isolation. Current density is large within dense TSV array and could produce relatively large electromagnetic crosstalk between TSVs. Parasitic inductance of TSV increases impedance of the entire power distribution network and bring some new EMI problems in the vertical direction. These problems limit the application of TSV three-dimensional packaging technology in high-speed electronic systems.In view of this issues, this thesis firstly studies full-wave electromagnetic modeling and signal transmission characteristics of TSV Interposer, establishes circuit models for GS, GSG and GSSG structure TSV-Bump-RDL signal paths, a software of extracting each parasitic parameter value and generating SPICE netlist file to achieve a subsequent circuit/system cascade simulation analysis is developed, making the existing modeling analysis method more applicable in practical engineering, and analyzes the effection of different TSV layouts/physical dimension on signal transmission performance. Secondly, explores the accurate via modeling and parasitic parameter extraction method in multi-layer substrate for three-dimensional package, and produces an easy-to-use via parasitic parameter extraction software based on this algorithm to increase its practicability. Then, proposes a novel TSV interposer design with two metallization layers, in which there are two metallisation layers directly contacting to the up and down surfaces of the silicon substrate. It can be a substitution for conventional TSV interposer with "sandwich" structure composed of insulating layer between metal layer and silicon substrate, to prevent the forming of metal-isolation layer-semiconductor capacitance effects vertically. Research shows that it has better signal transmission performance and can eliminates resonance problem. Meanwhile, derives its parasitic parameter extraction method and equivalent circuit modeling from mirroring theory. Finally, designs some low-EMI compact substrate integrated waveguides for millimeter-wave/THz high-frequency circuits based on TGV technology which can eliminate the loss in silicon substrate caused by its low resistivity, lower the complexity of the production process, reduce the production cost, and is expected to become alternative to the silicon substrate.