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The Implementation Of JPEG Image Compression Algorithm Based On FPFA

Posted on:2014-04-08Degree:MasterType:Thesis
Country:ChinaCandidate:S L PuFull Text:PDF
GTID:2268330425466325Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The amount of image data is very large,and the transmission capacity of underwateracoustic channel is limited.The image data must be compressed first, so that the imagesacquired by the imaging sonar could be displayed in real time。In this paper, a JPEG basicmode encoder used for sonar image compression is implemented with the Verilog HDL andthe design software Quartus II9.0. JPEG is the current mainstream image compressionstandard, and it is easily to find a lot of pictures in JPEG format from the Internet.Data throughput of image processing is very high. More and more design choose theFPGA which has powerful parallel processing capabilities, in order to achieve a goodreal-time. At first, this paper introduces that the image compression technology and thehistory of the development of the image compression standard briefly, and then build a JPEGimage compression system and describe the implementation of the JPEG basic mode encoder indetail, which based on FPGA. It gives the detailed description of each functional moduledesign ideas for the encoder.Build the CPU of the system with NIOS II soft-core and design the JPEG encoder module withVerilog HDL. The encoder module choose Chen’s algorithm for the calculation oftwo-dimensional discrete cosine transform. Then choose multiply operation instead of thedivide operation in the quantization process. The function of Zigzag scan is implemented bycontrolling the read-address of quantization module. The rapid implementation of Huffmancoding of the DC coefficient and the AC coefficient is in the form of a lookup table. Thedesign has a functional simulation test and hardware test. Hardware test is on a chip ofAltera’s Cyclone II family. Input the source image data by RS232serial port. The compressed datais transmitted to the PC through the RS232serial port, and the whole compressed picture isdisplayed which decoded by the third-party software on the PC.The final test results show that the design meets the intended target, and it canimplement the function of the JPEG standard encoder of the basic mode.
Keywords/Search Tags:Digital Image Compression, FPGA, JPEG, Verilog
PDF Full Text Request
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