Parallel Algorithm Of Image Edge Detection And FPGA-based Implementation

Edge detection in digital image technology is the first important step of imagesegmentation, computer vision and pattern recognition, The detected edge qualitydirectly determines the effect of the latter part of high-level image processing such asfeature extraction, target matching, image measurement and target identification. Aftera long-term study of the edge detection algorithm, edge detection in noise immunity anddetection edge quality have greatly improved, but also greatly increased the complexityof the algorithm. Facing the mass of the image data in the practical application is howto guarantee the real-time nature of the edge detection algorithm has been a problem.Design computing circuit to realize curing algorithms and computing parallelization cangreatly improve the computing speed of the algorithm. In these solutions, FPGA-basededge detection algorithm can be designed flexibility, able to meet people of imageprocessing equipment miniaturization, low-cost requirements, has a good prospect ofapplication.This article first collection of existing FPGA-based edge detection scheme,learned by the limitations of the FPGA computing power, focused FPGA-based edgedetection algorithm improved the Sobel operator the sub law and simplify Cannyalgorithm, the processing speed of the algorithm greatly enhanced, but detect the edgesin the image quality remains to be improved, and do not have the self-adaptability andversatility.On the basis of analysis of the Sobel algorithms and Canny algorithm, I usingNMS improved Sobel edge detection algorithm to improve the quality of the edgedetection. By contrast the existing threshol algorithm on the FPGA applicability,Combining the gradient distribution for the results of improved Sobel algorithm, Ipropose an HMSD threshold selection method supporting the improved algorithm.Then this article design adaptive edge detection parallel algorithms on a FPGAplatform, parallel optimization of arithmetic circuit employs a pipelined architecture anda distributed parallel structure, at the same time propose a the split subgraph architecturealso effectively shorten the processing time of the algorithm.Finally, I realize the edge detection system using the above adaptive edge detectionparallel algorithms on the development board, verified by experiment, the performanceof the algorithm in detecting edge quality is superior, and at the same time to ensure the real-time nature of the system.Overall, my paper ensure real-time performance, it is effective to improve thequality of edge detection and make the algorithm has a self-adaptive. it makes aneffective exploration for the application of FPGA technology in the field of embeddedimages.