An FPGA Implementation Of FDTD Algorithm

Recently, Finite Difference Time Domain (FDTD) method, have been extensively used forantenna analysis. The FDTD method provides a direct time-domain solution of Maxwell’sEquations in differential form by discrediting both the physical region and time interval using auniform grid. It divides the calculation domain into minute cube cells, and calculates electric andmagnetic fields one after the other for each cell .But the method needs a very long processing time.FPGA, which excels in parallel processing of simple calculations, has attracted much attention tosolve this problem.In this paper, we use FPGA to implement FDTD algorithm, pipelining and parallelism are usedto reduce computation time. In addition, we use dual-port RAM store data. Distributed memoriesare added into design to reduce data access time. Combining the strength above, the computation isgreatly speeded up. The numerical representation complies with the IEEE-754 32 bitsingle-precision floating-point specification.This paper presents implementation of the 2D FDTD algorithm by FPGA which circuit isdescribed by the verilog HDL, The target chip we used here is EP3C55F484C6 of Cyclone III seriesFPGA made by Altera Inc. The 2D FDTD simulation was done for 60×60 grid size, Themicrowave fields are assumed to be excited by the Gaussian pulse in the middle of the field. Asimulation result by ModelSim shows electric-field value Ez distribution at 60 times steps, therelative error in the electric-field strength between C language software simulation and the FPGA is0.11%. The performance of FPGA operates in 10MHZ system clock frequency is 22 times thansoftware of C language on standard PC (CPU 2.12 GHz, Memory DDR2 2 GB, single thread,non-parallelized, Visual C++ 6.0 compiler).