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Design Of The Communication Interface On Signal Processing Board Based On FPGA

Posted on:2014-07-14Degree:MasterType:Thesis
Country:ChinaCandidate:K H ZhuFull Text:PDF
GTID:2268330422951741Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the development of semiconductor device, the sampling rate of AD has greatlyincreased, the digitalization of signal processing system has increased and largeamount of real-time data needs to be transferred within the system. Hence, higherquality of data transmission rate is demanded for both civil and national defenseindustry. Currently, the transferring speed of regular communication protocol couldnot meet the increasing demand of system. And the protocol with high rate oftransfer which is special designed for field of communication costs too much that.Thus we need a new type of interface which has simple structure and high rate ofdata transfer to fulfill the demand of signal process system.This article aims to provide a method to realize the high rate of communicationinterface for radar signal processing system, so that the host computer can receivethe real time data from signal processing system through this interface. In addition,the data could be used in further processing or recording. The ADC continues toproduce high rate of sampling data and send the data to the host computer. Therefore,the efficiency and the reliability is demanded by the communication interfacebetween signal processing system and host computer. This article presents a designof a communication interface which could meet the demand of characteristicsmentioned above and can be used to transfer data between boards or cases.The article analyzed the OSI-RM model based onto the actual application. Inaddition, some adjustments were made onto the model in accordance with the actualdemand of engineering application. Based on the reference model of OSI-RM,hardware and software were applied into FPGA and processors separately to achievethe function of each layer in the consult model. In this project, HDL was used todesign the logic of physical layer and data link layer. C and C#language were usedin signal processing system and host computer to achieve the communicationprotocol of network-transport layer. After debugging in the real system, it isconcluded that the interface possesses characteristics of efficiency and reliability andis able to be applied into actual system.
Keywords/Search Tags:high speed data transfer, FPGA, RocketIO, TS201, slip window
PDF Full Text Request
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