Design Of High-speed Data Acquisition System Based On FPGA

With the development of science and technology and the wide application of data acquisition technology in the field of radar, communication, aerospace measurement, multimedia and so on, people necessitate higher and higher requirement for sampling rate and processing speed of high-speed data acquisition system. Field Programmable Gate Array (FPGA) gained rapid development in the 1990s. After 20 years'development, FPGA has become one of the mainstream platforms to implement digital systems. FPGA has the characters of fast processing speed, high clock frequency and easy to modify, in this paper we design a high-speed data acquisition system based on FPGA and evaluate the performance of the system. The main research contents could be stated as follows:1) According to the tasks and requirements of the high-speed data acquisition system, we propose an overall solution of the system. As the control logic of the system, FPGA combines with Analog-to-Digital Converter (ADC), serial-switched network, Flash memory array and the upper computer to form the entire system.2) Using the top-down design method, the system is divided into several functional modules. In this paper, we implement some main modules in Xilinx ISE development environment by using VHDL description language, and then verify their function with the Simulator simulation tools.3) In addition, the paper also provides a method to calculate 6 commonly-used indicators as a quantitative measure of ADC's dynamic performance. This method is based on Fast Fourier Transform (FFT) algorithm, analyses the distortion and noise of the data acquisition system in the frequency domain and the synchronization between the multiple channels. Finally, according to the experimental data, we figure out the actual value of each indicator, thereby evaluate the system's performance.According to the design scheme and implementation strategy given by the paper, we complete the whole design of the system on the FPGA platform. Experimental results show that: the system can digitize analog signals synchronously for quad channels, and can meet the requirements of the system's application.